ADS61B23 数据手册 - TI（德州仪器）

十二分之十四位，二百一分之二百五MSPS ADC，具有DDR LVDS和并行CMOS输出 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs

14位， 125/105/80/65 MSPS的DDR LVDS / CMOS输出的ADC 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

十二分之十四位，二百一分之二百五MSPS ADC，具有DDR LVDS和并行CMOS输出 14/12-Bit, 250/210 MSPS ADCs With DDR LVDS and Parallel CMOS Outputs

12位， 125/105/80/65 MSPS的DDR LVDS / CMOS输出的ADC 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

14位， 125/105/80/65 MSPS的DDR LVDS / CMOS输出的ADC 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

12位， 80 MSPS ，提供缓冲模拟输入ADC 12-BIT, 80-MSPS ADC WITH BUFFERED ANALOG INPUTS

14位/ 12位， 250 MSPS ADC，具有集成模拟缓冲器 14-/12-Bit, 250-MSPS ADCs With Integrated Analog Buffer

12位， 125/105/80/65 MSPS的DDR LVDS / CMOS输出的ADC 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

12位， 125/105/80/65 MSPS的DDR LVDS / CMOS输出的ADC 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS